As the supply voltage of the ADC continues to decrease, the swing of the input signal continues to decrease, and the precise control of the common-mode voltage of the input signal becomes more and more important. AC-coupled inputs are relatively simple, while DC-coupled inputs are more complex.
A typical example is the circuit design of the quadrature downconverter (mixer) output to the ADC input. The mixer outputs a differential signal with a common common-mode voltage error that needs to be filtered before it is sent to the ADC input and the DC level is converted to the level required by the ADC input. This design is more challenging.
A second order filter circuit is often required between the amplifier output and the ADC input. On the one hand, a capacitor needs to be placed in front of the ADC input pin to absorb the switching interference of the sample-and-hold circuit in the ADC. On the other hand, resistors or inductors need to be placed at the output of the amplifier to isolate this capacitive load, ensuring that the output of the amplifier is stable. The purpose of designing second-order filtering is to obtain better filtering characteristics and cut-off frequencies. If there is no buffer at the internal input of the ADC, such as Intersil's FemtoCharge family of ADCs, the ADC input will have a significant periodicity (consistent with the sampling frequency) to sink current. In this way, it is important to ensure that the input signal DC level is controlled within the required level of the ADC.
The new fully differential amplifier (FDA) controls the common-mode voltage of the output differential signal, which is completely independent of the input voltage. Keep in mind that this is done by outputting a specific voltage on the ADC Vcm pin, completely independent of the common-mode voltage on the input signal chain. There is inevitably a voltage drop between the FDA output and the ADC input, which is due to the equivalent impedance on the line. Thus, the common mode voltage that actually reaches the input of the ADC will inevitably have a certain error. The magnitude of the error is related to the input current of the ADC and the different common mode voltages required by different devices, and there is a certain uncertainty. At present, most high-speed ADCs are powered by 1.8V, and the required input common-mode voltage is mostly between 0.4-0.8V, and the acceptable error range is small. Most new ADCs will list SFDR vs Vcm curves with no more than +/-200mV between Vcm and Vcm typical values.
Another problem is that in FDA's DC-coupled differential output applications, there is bound to be a common-mode current flowing through the amplifier feedback circuit. In some FDA models or applications, this current will be larger, even exceeding the rated current of the mixer. And / or vice versa, affecting the common-mode voltage of the input current in front of the FDA, and even causing signal saturation. These issues must be fully considered when designing a DC-coupled ADC input circuit.
The design below is a good alternative. Two current feedback amplifiers (CFAs) are used as amplifiers on the signal path, and a low-cost voltage feedback amplifier is used to form a feedback network to control the common-mode voltage of the signal path.
Using two current feedback amplifiers
From left to right:
The downconverter outputs an AC differential signal, and the common mode voltage is a specific value of Vcm1. The high frequency noise and image frequency are then filtered out by an LC filter circuit. The filter consists of a small resistor, an inductor in series, and a capacitor. The filter is followed by an impedance matching network consisting of Rg and Rt. Don't forget, if you need to keep the DC component of the signal, you only need L in the filter.
Rt and Rb are not required. Rt"Rg, Rt sets a part of the filter termination impedance (the negative input of the CFA is low impedance, and Rg can be seen here as a ground connection). One of the functions of this resistor network is to use the mixer's output common-mode current to form a voltage drop across Rg, thereby controlling the common-mode voltage within the dynamic range of the CFA negative input. In many cases, this resistor network is not required, but only Rg is required for termination. However, Rb can effectively control the common mode voltage to the required level without affecting the AC signal. The price is to increase a little current.
Rg and RF together form the gain of the op amp. Unlike VFA, the Rf value of CFA needs to refer to the value recommended by the device. If the Rf is too large, it will compensate the op amp, reduce the bandwidth, and increase the current noise. If Rf is too small, it will overshoot at the output. The values ​​in the figure are typical for applications where the EL5167 bandwidth is greater than 400MHz.
The op amp output is a pair of differential RLC filters. When selecting a device parameter, first select the capacitor value that matches the input characteristics of the ADC. A smaller inductor value is more suitable to prevent the inductor's own resonant frequency from falling within the filter passband. The function of the series resistor is to isolate the op amp from its inductive/capacitive load, keep the op amp stable, and protect the ADC input from excessive current flow into the ADC, but it will cause some signal attenuation. Finally, there is a shunt resistor. In fact, the internal input of the ADC also has such a resistor. The two resistors in parallel reduce the resistance by half. This resistor senses the common-mode voltage of the signal without affecting the signal itself. This filter is a second-order low-pass filter with a cutoff frequency of 102 MHz and a Q of 0.9. This signal will have a slight overshoot, but the second-order -3dB bandwidth is 123MHz. Combined with the KAD5610P-25, dual 10bit, 250MSPS FemtoCharge ADC, the filter can effectively filter out the noise caused by the signal chain and amplifier. At a sampling rate of 250 MSPS, the ADC input DC current is approximately 1.1 mA, and the impedance from the amplifier to the ADC is 60.4 ohms, then the DC voltage drop is 66.4 mV. This voltage drop can be compensated by a feedback compensation network consisting of the ISL28113.
The EL5167 output swing is +/-3.9V when powered from +/-5V. The ADC is powered by a single 1.8V. The internal protection diode is activated when the input signal is outside the range of 0.6V. The series resistance of 60.4 ohms ensures that the current when the diode is turned on does not exceed 24mA (positive end) and 54mA (negative end), which can effectively protect the device from damage.
The ADC will provide a Vcm reference voltage output. This feature is very useful, especially for multi-channel ADC (such as KAD5610P-25) power-on calibration, which can eliminate the Vcm error between devices, make the Vcm value between multiple ADCs highly consistent, and the accuracy is very high. This function can be achieved by comparing Vcm2 in the figure with Vcm on the amplifier's outgoing signal and then through the feedback network of the ISL28113. The low-speed ISL28113 VFA sends the difference between the two voltages to the positive input of the high-frequency CFA, which keeps the Vcm of the CFA output consistent with Vcm2. In this way, we no longer need to consider the Vcm error produced by the mixer or other devices.
Some of the other devices in the figure are optional or for the selected device.
The 1k ohm resistor grounded at Vcm2 is used to pull down and generate a pull-down current. Since the KAD5610-25 can only output current, the op amp circuit requires bidirectional current. A pull-down resistor provides bidirectional current.
Two Ra resistors are connected to the negative voltage from the output of the op amp, which produces a Class A current. This reduces the distortion of the signal output without affecting the frequency response of the circuit. In general, adding a Class A pull-down current ("5 mA" can significantly improve third-order harmonic distortion in differential signals. However, this high-order harmonic distortion is inherently weak in differential architectures.
The voltage at the VFA output is sent to the CFA forward input through a low pass filter. It consists of a 1k ohm resistor and a 0.1uF capacitor. It can effectively filter out the noise in the signal. The 20 ohm resistor can reduce the system Q and keep the system stable.
The LC filter between the mixer and the op amp is terminated with a resistor Rg. Typically, if the op amp is a VFA, this terminating resistor will cause an equivalent impedance increase at the "virtual" point of the op amp outside the filter passband. However, if you use CFA, you will not use this problem. The CFA open-loop gain will drop at around 300MHz, and the inverting input will still maintain a low impedance because the CFA has an open-loop buffer drive input stage that maintains the low impedance of the input stage. The bandwidth of these buffers is greater than 1.5 GHz, so even if the signal frequency is higher than the CFA bandwidth, the negative input can still maintain low impedance.
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