Journal of Electronics Feb.2roi.03 Current status and progress of radio frequency integrated circuits Wang Zhihua, Wu Ende Department of Electronic Engineering, Tsinghua University, Beijing 184 structure, compare their advantages and disadvantages Point out some questions to be considered in the design. Secondly, the important functional units of 108 RF front-end, including low-noise amplifier mixer frequency synthesizer and power amplifier. The technical indicators of each unit module in the design. The possible circuit structure and questions that should be paid attention to were discussed. Also. The paper also discusses the possibility and method of integration of passive devices such as inductive capacitors in the radio frequency band. Finally, some views were put forward on the development direction of 01 RF integrated circuits.
i Introduction In the past ten years. Pager cordless telephone analog and digital cellular telephone and other personal communication systems and digital television broadcasting have developed rapidly, and the demand for light weight, small size, low power consumption and low cost transceivers has also increased rapidly. Increasing transceiver integration is undoubtedly an important way to meet the above requirements. In the past art. The front end of the shooting collar adopts 81% to 50% skill. Mountain digital processing usually accounts for more than 75% of the chip area. The requirements of indicators such as integration and power consumption make it impossible to implement other processes than 103. Therefore, only 10% of the RF front-end can be used as a chip-integrated transceiver and finally realize a single-chip integrated mobile communication product. At present, with the development of 6 cubits and 03 arts, its unit gain cut-off frequency has been close to the human 8 level. At the same time, some of the unit circuits and reception of the RF front-end realized by 8 processes have appeared. This also makes it possible for the mining process to move and double chip integration of the product is possible.
Compared with other processes. ， 8 technology has shortcomings such as small transconductance, poor frequency characteristics, large noise, and difficult integration of passive devices. For implementation, 106 RF integrated circuits. At the system level, it is necessary to study the transceiver architecture to minimize or even eliminate the passive components required in the transceiver and reduce the technical requirements of the system for the RF front-end; at the circuit level, it is necessary to study high-performance unit circuits that can work in the RF band And high quality factor passive devices.
The status quo and forecast the future development direction of this field.
2 Transceiver architecture reception is the main part of the transceiver. The most classic structure of wireless reception is superheterodyne reception or intermediate frequency reception. It transforms the in-band signal from radio frequency to a fixed intermediate frequency, and then performs band-pass filter automatic gain control and other processing at the intermediate frequency. It uses a large number of high quality factor separation elements to form a unit circuit to achieve high selectivity and high sensitivity. 5 mainly includes low-noise amplifier mixer RF intermediate frequency and image frequency suppression filters and voltage controlled oscillators. In order to adopt, 05 process integration brings difficulties.
Broadband IF reception 4 is a variant of IF reception. It uses a fixed local oscillator to transform the in-band signal from RF to IF and then performs low-pass filtering. Channel selection is done during the first frequency conversion. Therefore, the first frequency-converted local oscillator signal can be generated by a frequency synthesizer with a fixed frequency division ratio. Since the phase noise transfer function of the voltage-controlled oscillator is a high-pass function, the use of a broadband frequency synthesizer can reduce the phase noise requirements of the voltage-controlled oscillator. In addition, there are other problems in channel selection during the zeroth IF reception. For example, in the case where the symmetry of the mixer is degraded, the two strong interferences near the effective channel may alias into the baseband during the downconversion process, causing even-order distortion. ; Plant 2 two orthogonal channels mixer mismatch caused interference to the baseband part. These problems can be eliminated by digital processing of the baseband. In addition, the local oscillator leakage will also be transmitted from the antenna, causing interference to other receivers.
The traditional analog-to-digital conversion in the reception is carried out in the baseband, so the analog intermediate frequency stage is needed in front. Sampling IF receiver 82 converts the IF signal to the first IF through sub-sampling, then digitizes it by a bandpass 2 analog-to-digital converter, and finally downconverts it to a baseband signal by a digital mixer. This solution improves the digitization process of the receiver5, increases flexibility and reduces power consumption.
The frequency conversion process is completed, which increases the flexibility of the system. Appropriate selection of the frequency of the first local oscillator signal can constitute a double-frequency transceiver intermediate frequency reception. There is a mirror frequency interference, that is, in the down conversion process, the useful signal and its symmetry about the local oscillator signal The mirror image frequency signal is converted to the same rate suppression structure. The most important ones are 31 and 5. The structure cabinet 1 Jia structure phase filter can only achieve narrow-band image frequency suppression, and the structure and the double orthogonal structure can achieve active image frequency suppression; The use of the second intermediate frequency for channel selection does not require a 2 bandpass filter, and the adjustment of the first local oscillator can constitute multi-standard reception; the first local oscillator is not the same as the carrier frequency, and there is no DC offset problem. But both of these structures use more mixers, so they increase power consumption and distortion.
Zero Intermediate Frequency Receiver 2 uses a mixer to directly convert the in-band signal from RF to 1 band. No, ask about the image frequency. Its difficulty lies in the need to design an RF frequency synthesizer, and the performance of the frequency synthesizer has a great impact on zero-IF reception as discussed below.
The main problem with zero-IF reception is DC offset. Because the local oscillator and the received signal have the same carrier frequency, the local oscillator signal leaks to the input terminals of the low-noise amplifier and the mixer when the local oscillator and the RF input port of the mixer cannot be ideally isolated. Mixing forms a DC offset. The gain from the antenna to the output of the analog-to-digital converter can generally reach 10 or more. Even a small DC offset may cause great interference in the baseband part.
To eliminate DC offset, the simplest method is to use a high-pass filter, but usually the low-end spectrum of the useful signal generated by the information modulation scheme can reach tens of hertz, requiring the passband edge frequency of the high-pass filter to be very low. This is not only difficult to achieve but also slow in response, and it is difficult to eliminate the DC offset that changes rapidly. For example, the better DC compensation method during handover is to subtract the adjustment 16 from the analog signal path after digital processing in the baseband; or use the spectrum The structure does not include sampling. The main problem with IF reception is noise aliasing. In the case of sub-sampling, in addition to the in-band signal, broadband noise and unwanted components will be mixed into the effective band, so the signal-to-noise ratio will deteriorate, and it will be divided into parts. The requirements of the device for the ability to suppress out-of-band signals. In addition, the sub-sampling stage has many sampling clock frequencies. The architecture of the transmitting part of the transceiver can be roughly divided into two categories: mixer-based and phase-locked loop-based. The former is divided into two kinds of up-conversion and direct up-conversion, basically similar to the architecture of the receiving part. For the mixer-based transmitter, there is a power amplifier followed by an RF filter, the image frequency suppression filter after the mixer and the intermediate frequency filter after the modulator directly up-convert the transmitter to reduce the image frequency suppression filter , But changed the IF filter into an RF filter. These filters undoubtedly increase the difficulty of integration and power consumption. Transmitter based on phase-locked loop can reduce the intermediate frequency filter system and upconverter fusion in two up-conversion transmitters. The inherent filtering characteristics of the phase-locked loop are used to suppress various harmonics and noise. In addition, in the direct conversion and phase-locked loop-based transmitters, due to the close operating frequency of the voltage controlled oscillator and the power amplifier, the voltage controlled oscillator may not work properly due to the power leakage of the power amplifier, and the isolation requirements Higher.
3. 08 The functional unit of the radio frequency integrated circuit 3.1 Low noise amplifier The low noise amplifier is the first module in the receiving part of the transceiver. Its important indicators have two noise indexes that determine the minimum detectable number 9; the order input cutoff point is The noise figure determines the dynamic range of spurious-free output. In addition, there are some additional requirements, such as proper gain and low DC power consumption.
Since the front stage of a low-noise amplifier is usually an antenna or a band-pass filter, in order to achieve the maximum transmission of power, the input stage of the amplifier is best matched to 50, in order to achieve low noise, it is also necessary to ensure noise matching. At present, low-noise amplification uses cascode channel and channel devices in wave frequency converters, which can ensure the reuse of current, thereby reducing power consumption. However, due to the use of channel devices, the maximum operating frequency of the mixer will be reduced. It is generally believed that the multiplier is a stacked form with 8, 〃108 technology, and a multiplier can use both an up-converter and a down-converter. For the down converter, the power supply voltage can be as low as 1.8 when the operating frequency is 190, and for the up converter when the operating frequency is as high as 50, the power supply voltage can be as low as! 5 In addition, the new multiplier structure can be used to improve the power supply voltage. Reference 13 proposes a parallel quadrant multiplier structure 4, which has only one tube between the power supply and ground, and the working power supply voltage can be as low as 1.2.
The device mainly has a form of resistance termination, termination, bypass resistance feedback and inductance source feedback. For the resistive termination form, due to 50, the noise contribution of the source resistance of 5 and 5 is the same. So the noise index of this structure will be more than 3 for the termination form of jealousy, the noise index is 1 + 7, where the capacity 7 is the channel thermal noise coefficient of 5 tubes. , Transconductance. , Is a zero-bias transpolar transconductance. For Shichanggou Xiao device. 7 is = 1. At this time, the inonan index is 22, when the channel length is as small as 7, 7 can be 2 to 3, and the corresponding feedback form can achieve better noise performance in narrow-band situations, so it is currently the most widely used.
In order to improve the linearity of the mixer, some new mixer architectures have been proposed, among them the city. It is necessary to have cross-sense coupling. No. 13 No. 1 type 14. Cross-convergence mixer 5 uses the input signal or the local oscillator signal to control the elbow 03 tube to work in the linear region. In order to ensure that the mixer can work correctly in a wide frequency range, it must be ensured that the two current summing points marked in 5 are especially virtual pools. This can be achieved by connecting to the input of the operational amplifier. For down-conversion resistor termination, 61-core termination, 0 bypass resistance feedback, magic inductance feedback, 3.2 mixing frequency, bubble frequency is the most critical module of the RF front-end, it realizes the frequency conversion process. The design of the mixer should comprehensively consider the linearity conversion gain port to port. The most widely used mixer structure is the use of multipliers. Its working principle is simple, but in the case of no predistortion circuit, the linear input range of the local oscillator is very small, so the multiplier type mixer usually works in the switching mode. This approach has two important flaws. First, in order to make the modulation tube switch almost instantaneously and prevent large-order intermodulation distortion, a large local oscillator square wave signal must be used. At the same time, a large local oscillator signal will cause a large local oscillator feedthrough. Secondly, in the square wave signal, the sub-harmonics are only lower than the fundamental wave signal and 14%, so it is necessary to connect a filter after the mixer to meet the out-of-band signal characteristics.
Frequency converter, the gain bandwidth product filtered by the feedback capacitor limits the frequency range of the output signal, especially for the upconverter. More importantly, enter the elbow 03 tube range. The sub-sampling mixer has good linearity in theory, but as mentioned in the sampling IF receiving section, it has the problems of high noise jitter and sampling clock time jitter requirements.
3.3 Frequency synthesizer The frequency synthesizer obtains a series frequency of the same order of magnitude as the reference source by adding, subtracting, multiplying, and dividing to a reference signal source with higher frequency stability. It is mainly used to generate transceivers. The local oscillator signal for channel selection is a key unit circuit in 8 integrated transceivers. The most common is the phase-locked frequency synthesizer, its main disadvantage is the large frequency division ratio. The design of programmable frequency divider has high power consumption. The frequency switching time is long. The direct digital frequency synthesizer is driven by a fixed clock. At fixed intervals, the digital sine waveform value stored in the memory is read out, which is converted into an analog signal by a digital-to-analog converter, and a high-frequency spurious signal is filtered by a low-pass filter. The advantage of direct digital frequency synthesizer is high frequency resolution. The frequency hopping time is short. But its operating frequency is generally limited to less than one output, and the spurious output is relatively large. At present, the main application is to form a high-resolution hybrid loop RF frequency synthesizer with a phase-locked frequency synthesizer.
Another noteworthy frequency synthesizer is a fractional phase-locked frequency synthesizer. It controls the dual-mode frequency divider of the phase-locked frequency synthesizer through the carry end of the accumulator. Zhong Qi works between two frequency division ratios. Average frequency division ratio, 1; medium.
Is the fractional part of the division ratio. Due to the periodic frequency division ratio jump. So it will happen. Known harmonics. And these harmonics cover the entire channel discretely. Therefore, these harmonics are predictable, and the complementary relationship between the accumulator summing terminal and the phase error of the phase discriminator output can be used to eliminate the fractional spurious output generated by these harmonics. The main disadvantage of this method is the complex structure and the need to use a high-precision personal converter. recent. Reference 15 uses a 24 modulator to modulate the required frequency division ratio. Therefore, the discrete harmonics are converted into colored noise, and the low-pass characteristics of the loop itself are used to filter into the hall. This method is superior to the previous error correction method in cost volume and complexity.
Among the various frequency synthesizers, only the voltage-controlled oscillator and the frequency divider work in the radio frequency band. The different types of oscillators are only 1. Tuned oscillators and ring oscillators may work in the radio frequency band. The main difficulty in the integration of tuned oscillators is the integration of inductors. The inductor occupies a larger area than the tuned oscillator, and the tuning range of the integrated circuit device is small. High manufacturing precision is required. In a traditional ring oscillator, the delay cannot be less than the delay of an inverter. Make the oscillation frequency limited. In order to increase the oscillation frequency, document 16 proposes a ring oscillator. It consists of an inverter and a transconductor, and the frequency of the output signal is = 2 cores through appropriate combination. 7 is the delay of an inverter. This structure proposes a ring oscillator with a single-ended negative skew delay structure. The so-called negative skew delay is actually to introduce a leading channel to achieve the purpose of increasing the operating frequency.
In order to improve the phase noise performance of the ring oscillator, Reference 18 introduces a differential shaped limiter to limit the output amplitude. The differential structure can suppress the power supply and substrate noise; the current distribution type delay unit is introduced in document 19; the local positive feedback is used in document 17 to improve the output voltage slew rate, thereby improving the phase noise characteristics. The phase noise performance of the ring oscillator is currently close to that of the tuned oscillator 71.
In the phase locked frequency synthesizer. The frequency divider is also a circuit unit working in the radio frequency band. The programmable frequency divider can handle all frequency division ratios. However, it cannot work in the radio frequency band, so a prescaler is used. The prescaler is divided into a class structure shift register ring 121. Clock pre-processing 21 and phase selection 2, structure. The main body of the latter two structures are asynchronous counters, of which only one register works at full speed. The working frequency is relatively high. But their logic control is more complicated. There are a lot of structure tubes. It can only work steadily in the low frequency band; dynamic, trigger clock control works in the switch mode. The noise is relatively large; current mode logic, the trigger works the fastest, and is not easily affected by power supply or substrate noise, but the output voltage amplitude is limited. And the constant power consumption or power consumption has nothing to do with the signal. Therefore, the power consumption is relatively large.
3.4 Power amplifier Power amplifier is the main large power consumption unit in the transceiver. In order to improve the additional efficiency of power, it is necessary to print ore. Generally used non-linear power amplifiers include class 1, etc. The linear power amplifier is suitable for constant envelope modulation scheme. In order to improve spectrum utilization. Multi-level modulation schemes are usually used. This requires nonlinear compensation of the nonlinear power amplifier into the hall.
00. Art looking. 1; Features; Realization, 108 episodes The main obstacle to successful Bian put 1 device. With the development of 0 cubies 03 process. The device size is getting smaller and smaller, and can work in the radio frequency band, but at the same time the gate oxide layer is getting thinner. Make the output voltage swing limited. On the other hand. , 108 devices have low current drive capability. Only a large-sized device can realize a large driving current. The large size not only makes the capacitive load of the front stage heavier, but also makes the inductance value of the matching network of the power amplifier larger. Only by success. Therefore, the voltage and current driving capabilities of the disc 6 amplifier are relatively small. Since the power amplifier outputs a signal with a large voltage or a large current swing, it will inevitably affect the work of other circuit modules through substrate coupling when implementing monolithic integration.
Only reduce substrate noise and double the output swing; use mode locking to reduce input drive. It works at 1.980 output, the output power is 1 watt, and the additional power efficiency reaches 48.
The nonlinear compensation of the power amplifier can be realized inside the power amplifier.
It can also be compensated by system-level advancement. Any 01 lattice amplifier can effectively suppress the order distortion under the condition of balanced input, so the order distortion is usually more effective than the order distortion. The channel 1 tube is even more so. Used in the Wenji 23, the characteristics of the decay tube in the linear region and the saturation region have opposite signs of distortion coefficients. Use elbow 08 tubes with different offsets in parallel. Reduce the amplifier's order distortion and improve linearity. The system-level compensation scheme mainly has the heart 1 plus ring. Adaptive baseband predistortion and adaptive feedforward compensation, etc., their discussion is beyond the scope of this article, and will not be repeated here.
4 Passive devices are currently used in digital systems. Passive devices such as resistors, capacitors, and inductors are generally not used in digital circuits. So in the design of 0% 06 RF integrated circuits. On the one hand, it is necessary to study a new type of architecture to minimize or even eliminate the passive devices required in the circuit, and on the other hand, how to adopt the standard CMOsi.Ajwgtfiiijiy.ifxfr.
Passive inductors have two forms: wire bond inductors and planar spiral inductors.
MiM wire or solder metal wire between the pad point and the package and between the package and the package. The bonding wire is suitable for any kind of process, and it can be considered as the standard 008 process. However, the most basic unit circuit of the welding frequency divider is a flip-flop or a latch. There is a solid line inductance in the manufacturing process that will produce vertical and horizontal length deviations and metal wire diameter deviations. As a result, the total inductance changes, so the re-planar spiral inductor 21 of the wire bond inductor is a metal layer wound on the silicon chip. It has many parasitic effects. First, the parasitic capacitance between the substrate and the self-resonant frequency is limited; secondly, due to the skin effect and other electromagnetic field effects. The calculated series resistance slightly deviates from the actual resistance; in the end, the heavily doped substrate will cause deterioration of the quality factor and decrease of the inductance value. Current research on planar spiral inductors focuses on reducing series resistance and substrate losses. The main methods are to use thick metal layers; multi-metal layers in parallel; in post-processing, the silicon material is etched away from the top or bottom of the silicon wafer; thick dielectric materials are used. Physically isolate the inductor from the lossy silicon substrate. These methods will increase the process flow. Literature 20, after simulating the above-mentioned parasitic effects into the hall finite element method, it is concluded that in the standard, the inductance in the center of the coil is increased due to the high-frequency eddy current effect. The inductance value decreases. Resulting in a decline in the quality factor; 3 limit ifiifRiMi occupied by the coil! lJt5MJ ;! ilMU! ftMfK4r4ifeffL =, additional resistive loss, the inductance value is reduced. In the small line, the magnetic field does not penetrate deep through the substrate and has little effect.
51 new devices. New unit circuits and new architectures are in the development of radio frequency integrated circuits. The most urgent and most difficult thing is to develop high-performance new devices and new unit circuits. They are the basis for implementing a single chip, 108 integrated RF front end. These include high-value passive devices such as inductors, capacitors, varactors, etc., low-phase noise voltage-controlled oscillators, and high-efficiency, high-linearity power amplifiers.
As the working speed of the digital-analog hybrid circuit increases. Especially the improvement of the working speed of the analog-to-digital converter is in the transceiver architecture. The digitization process is irreversible. From zero-IF to digitalized low-IF, digitalized high-IF, and finally the realization of software radio, it is the embodiment of this development trend.
5.2 Multi-standard transceivers in the current situation of numerous digital mobile communication standards. Transceivers that are compatible with multiple standards actually provide users with more choices. However, the multi-standard transceiver also brings some new difficulties. It requires that all unit circuits can work in a wide frequency band, and the performance must be as optimal as possible. For consumer products. There are also price requirements.
5.3 Radio frequency, generally 0 or below 10, for effective filtering. Need to enhance the circuit. 1 The basic principle is to connect a negative conductance in parallel next to the inductor to compensate the resistance loss of the inductor. Negative conductance can be generated through a positive feedback network. The rise of the negative conductance 0108 radio frequency integrated circuit than the 6 circuit 3 is only in the last ten years. , 3 process in the radio frequency band model substrate coupling interference accurate prediction package model.
Extraction of distributed parameters such as wiring inductance and it is suitable for RF integrated circuit 5.4 to develop transceivers in higher frequency bands. Reimagine the standards suitable for integration. With the development of digital mobile communications towards higher frequency bands, the technological level of the 106 standard continues to improve. Need to develop and design higher frequency transceivers. In this process. Not only need to study the new features brought by the new process. And in formulating the figures for the transconductance of 1 and 2 tubes. 3 Take bamboo. 1 Agriculture adjusts Han, 1 and 2.
The basic goal of on-chip capacitor design is to make the series resistance as small as possible to ensure the maximum value of 2; make the capacitance per unit area large; and reduce parasitic capacitance. There are a variety of gate capacitances to achieve integrated capacitance. Junction capacitance. When inter-metal layer or metal mobile communication standards need to be considered in the initial stage, 103 integration asks.
The 55-power adaptive transceiver is generally powered by batteries because of digital mobile communication equipment, so it obviously requires low power consumption and low voltage operation. But under certain circumstances. To achieve a certain function requires a certain power consumption. For example, when the received signal is strong. Can reduce the power consumption of low noise amplifier and voltage controlled oscillator. Achieve the same signal-to-noise ratio.
Layer and polysilicon capacitance and thin insulating layer capacitance. Because the gate oxide layer is very thin, the capacitance of the gate capacitance per unit area is large, but the gate capacitance is non-linear, and the DC bias voltage needs to be set, and the breakdown voltage is small. The 2 value can be optimized to achieve more than 100. 25. Junction capacitance is highly nonlinear. The bias voltage needs to be set, and the capacitance between the metal layer of the process or between the metal layer and the polysilicon layer is linear, and the temperature is small, the 2 value is large, but the capacitance per unit area is small. The parasitic capacitance between the bottom plate and the substrate is large.
The principle of the fractal capacitor 1 year 1 proposed in article 2 is to use the lateral electric field between the edges of the metal layer to realize the capacitance, and the fractal capacitor has the following advantages. As the process size decreases. The electric capacity per unit area increases. The matching of the thickness of the oxide layer is converted into the consistency between the plates, and due to the pseudo-random nature of the fractal case, the deviation between the plates is very small. As the longitudinal electric field decreases. The parasitic capacitance between the bottom plate and the substrate also decreases accordingly. The biggest difficulty in designing fractal capacitors is the need for special software to design fractal cases.
5 Possible future development direction Therefore, according to the changes of the environment, the distribution of performance indicators such as the dynamic range of the gain among each unit circuit should be dynamically controlled. To achieve the purpose of optimal power consumption.
Wang Zhihua was born in 1960, and received a bachelor's degree and a doctorate degree from Tsinghua University in 1983 and 1985, respectively. Now he is a professor in the Department of Electronic Engineering of Tsinghua University. Departure from membership, the chairman of the Chinese branch of the Solid State Circuit Society. The research direction is circuits and systems, including the design of digital-analog mixed-signal integrated circuits and the design optimization technology of integrated circuit 1 design.
Wu Ende was born in 19 years, graduated from the Department of Electronic Engineering of Tsinghua University in 1997 with a bachelor's degree. The main interest is integrated circuit design.
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